Terminus Group Proposes a New Graph Transformer GANs to Tackle Architectural Layout Generation Tasks

Recently, Terminus Group proposed a novel Graph Transformer Generative Adversarial Network (GTGAN) to solve architectural layout generation tasks with graph constraints.

Research Potential 

The research findings have broad application potential in generating architectural layouts that meet specific graph structural constraints and requirements. These include factors such as transportation, green spaces, public facilities, and public management scenarios like construction management, supervision, and emergency rescue support.

Methodology

The novel Graph Transformer GAN (GTGAN) is designed to learn effective graph node relationships in an end-to-end manner, key steps are as follows:

ž Graph Transformer Encoder: integrates graph convolution and self-attention mechanisms within the Transformer to model both local and global interactions of connected and unconnected graph nodes.

ž Connected and Unconnected Node Attention Mechanisms: captures the global relationships of connected and unconnected nodes in the input graph, respectively.

ž Graph Modeling Block utilizes local vertex interactions based on the topology of architectural layouts.

ž Node Classification-Based Discriminator preserves high-level semantics and distinguishes node features of different house components.

ž Graph-Based Cycle Consistency Loss ensures relative spatial relationships between real and predicted graphs, the team proposed a new graph-based cycle consistency loss.

ž Self-Guided Pretraining Method executes as a final step for graph representation learning. It involves masking nodes and edges simultaneously at a high masking ratio (i.e., 40%) and using an asymmetric graph-centered autoencoder architecture for subsequent reconstruction.

Objective quantitative evaluations and subjective visual realism assessments demonstrate the superiority of the proposed method compared to existing technologies.

Original Thesis

Graph Transformer GANs With Graph Masked Modeling for Architectural Layout Generation | IEEE Journals & Magazine | IEEE Xplore